{"_buckets": {"deposit": "ce863f25-a0c9-4e4c-a6ab-37c5b2da4ce7"}, "_deposit": {"id": "1865", "owners": [], "pid": {"revision_id": 0, "type": "depid", "value": "1865"}, "status": "published"}, "_oai": {"id": "oai:niigata-u.repo.nii.ac.jp:00001865"}, "item_5_biblio_info_6": {"attribute_name": "\u66f8\u8a8c\u60c5\u5831", "attribute_value_mlt": [{"bibliographicIssueDates": {"bibliographicIssueDate": "2007-03", "bibliographicIssueDateType": "Issued"}, "bibliographicIssueNumber": "3", "bibliographicPageEnd": "650", "bibliographicPageStart": "642", "bibliographicVolumeNumber": "E90-A", "bibliographic_titles": [{"bibliographic_title": "IEICE transactions on fundamentals of electronics, communications and computer sciences"}, {"bibliographic_title": "IEICE transactions on fundamentals of electronics, communications and computer sciences", "bibliographic_titleLang": "en"}]}]}, "item_5_description_4": {"attribute_name": "\u6284\u9332", "attribute_value_mlt": [{"subitem_description": "In this paper, theoretical properties of deinterlacer banks are analyzed. Deinterlacer banks are novel filter banks in the sense that a progressive video sequence is separated into two progressive video sequences of a half frame rate and, furthermore, interlaced sequences are produced as intermediate data. Unlike the conventional filter banks, our deinterlacer banks are constructed in a way unique to multidimensional systems by using invertible deinterlacers, which the authors have proposed before. The system is a kind of shift-varying filter banks and it was impossible to derive the optimal bit-allocation control without any equivalent parallel filter banks. This paper derives an equivalent polyphase matrix representation of the whole system and its equivalent parallel structure, and then shows the optimal rate allocation for the deinterlacer banks. Some experimental results justify the effectiveness of the optimal rate allocation through our theoretical analysis.", "subitem_description_type": "Abstract"}]}, "item_5_full_name_3": {"attribute_name": "\u8457\u8005\u5225\u540d", "attribute_value_mlt": [{"nameIdentifiers": [{"nameIdentifier": "5939", "nameIdentifierScheme": "WEKO"}], "names": [{"name": "\u6751\u677e, \u6b63\u543e"}]}, {"nameIdentifiers": [{"nameIdentifier": "5940", "nameIdentifierScheme": "WEKO"}], "names": [{"name": "\u83ca\u6c60, \u4e45\u548c"}]}]}, "item_5_publisher_7": {"attribute_name": "\u51fa\u7248\u8005", "attribute_value_mlt": [{"subitem_publisher": "The Institute of Electronics, Information and Communication Engineers"}]}, "item_5_relation_31": {"attribute_name": "\u7570\u7248\u3067\u3042\u308b", "attribute_value_mlt": [{"subitem_relation_type": "isVersionOf", "subitem_relation_type_id": {"subitem_relation_type_id_text": "http://www.ieice.org/jpn/trans_online/", "subitem_relation_type_select": "URI"}}]}, "item_5_rights_15": {"attribute_name": "\u6a29\u5229", "attribute_value_mlt": [{"subitem_rights": "copyright\u00a92007 IEICE"}]}, "item_5_select_19": {"attribute_name": "\u8457\u8005\u7248\u30d5\u30e9\u30b0", "attribute_value_mlt": [{"subitem_select_item": "publisher"}]}, "item_5_source_id_11": {"attribute_name": "\u66f8\u8a8c\u30ec\u30b3\u30fc\u30c9ID", "attribute_value_mlt": [{"subitem_source_identifier": "AA10826239", "subitem_source_identifier_type": "NCID"}]}, "item_5_source_id_9": {"attribute_name": "ISSN", "attribute_value_mlt": [{"subitem_source_identifier": "09168508", "subitem_source_identifier_type": "ISSN"}]}, "item_creator": {"attribute_name": "\u8457\u8005", "attribute_type": "creator", "attribute_value_mlt": [{"creatorNames": [{"creatorName": "Hiki, Minoru"}], "nameIdentifiers": [{"nameIdentifier": "5935", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "Muramatsu, Shogo"}], "nameIdentifiers": [{"nameIdentifier": "5936", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "Ishida, Takuma"}], "nameIdentifiers": [{"nameIdentifier": "5937", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "Kikuchi, Hisakazu"}], "nameIdentifiers": [{"nameIdentifier": "5938", "nameIdentifierScheme": "WEKO"}]}]}, "item_files": {"attribute_name": "\u30d5\u30a1\u30a4\u30eb\u60c5\u5831", "attribute_type": "file", "attribute_value_mlt": [{"accessrole": "open_date", "date": [{"dateType": "Available", "dateValue": "2019-07-29"}], "displaytype": "detail", "download_preview_message": "", "file_order": 0, "filename": "e90-a_3_642.pdf", "filesize": [{"value": "800.4 kB"}], "format": "application/pdf", "future_date_message": "", "is_thumbnail": false, "licensetype": "license_free", "mimetype": "application/pdf", "size": 800400.0, "url": {"label": "e90-a_3_642.pdf", "url": "https://niigata-u.repo.nii.ac.jp/record/1865/files/e90-a_3_642.pdf"}, "version_id": "696d1a26-2073-488b-bcc0-80b2b66783e3"}]}, "item_keyword": {"attribute_name": "\u30ad\u30fc\u30ef\u30fc\u30c9", "attribute_value_mlt": [{"subitem_subject": "3-D filter banks", "subitem_subject_scheme": "Other"}, {"subitem_subject": "scalable video coding", "subitem_subject_scheme": "Other"}, {"subitem_subject": "rate-distortion control", "subitem_subject_scheme": "Other"}, {"subitem_subject": "interlace video", "subitem_subject_scheme": "Other"}]}, "item_language": {"attribute_name": "\u8a00\u8a9e", "attribute_value_mlt": [{"subitem_language": "eng"}]}, "item_resource_type": {"attribute_name": "\u8cc7\u6e90\u30bf\u30a4\u30d7", "attribute_value_mlt": [{"resourcetype": "journal article", "resourceuri": "http://purl.org/coar/resource_type/c_6501"}]}, "item_title": "Equivalent Parallel Structure of Deinterlacer Banks and Its Application to Optimal Bit-Rate Allocation", "item_titles": {"attribute_name": "\u30bf\u30a4\u30c8\u30eb", "attribute_value_mlt": [{"subitem_title": "Equivalent Parallel Structure of Deinterlacer Banks and Its Application to Optimal Bit-Rate Allocation"}, {"subitem_title": "Equivalent Parallel Structure of Deinterlacer Banks and Its Application to Optimal Bit-Rate Allocation", "subitem_title_language": "en"}]}, "item_type_id": "5", "owner": "1", "path": ["453/454", "423/424/425"], "permalink_uri": "http://hdl.handle.net/10191/6548", "pubdate": {"attribute_name": "\u516c\u958b\u65e5", "attribute_value": "2008-08-12"}, "publish_date": "2008-08-12", "publish_status": "0", "recid": "1865", "relation": {}, "relation_version_is_last": true, "title": ["Equivalent Parallel Structure of Deinterlacer Banks and Its Application to Optimal Bit-Rate Allocation"], "weko_shared_id": null}